package mult 

import chisel3._
import chisel3.util._

class SBFAInputBundle extends Bundle {
  val a = Input(UInt(1.W))
  val b = Input(UInt(1.W))
  val c = Input(UInt(1.W))
}

class SBFAOutputBundle extends Bundle {
  val s  = Output(UInt(1.W))
  val c = Output(UInt(1.W))
}

class SingleBitFullAdder extends Module {

  val in  = IO(new SBFAInputBundle())
  val out = IO(new SBFAOutputBundle())

  // Generate the sum
  out.s := in.a ^ in.b ^ in.c

  // Generate the carry
  val a_and_b = in.a & in.b
  val b_and_c = in.b & in.c
  val a_and_c = in.a & in.c
  out.c := a_and_b | b_and_c | a_and_c
}
